Posts Tagged ‘make’

GNU Makefile if problems

January 24, 2011

Adding functionality into a makefile can be a very frustrating process. I was recently trying to add a check for modified files before compiling.  Here’s how the rule looked:


checkdirty:
ifneq ( $(shell git ls-files -m | wc -l), 0 )
    @echo Detected modifed files.
    @exit 2 ;
endif

Basically, if any files were found changed the error would be printed. However, this would never work. I verified that git ls-files -m | wc -l returned 0 but the code would always execute. I eventually found the solution in the GNU Make documentation. From the page

Conditional directives are parsed immediately. This means, for example, that automatic variables cannot be used in conditional directives, as automatic variables are not set until the recipe for that rule is invoked. If you need to use automatic variables in a conditional directive you must move the condition into the recipe and use shell conditional syntax instead.

So essentially the shell command was never run when the ifneq was being parsed. I assume the strings were being compared which would explain always failing the equal test. The correct way to implement this test is then:


checkdirty:
    @if [ $(shell git ls-files -m | wc -l) -ne 0 ] ; \
    then \
        echo Detected modifed files. \
        exit 2 ; \
    fi